Transcend TS32MLS72V6D Datasheet Page 8

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T
T
T
S
S
S
3
3
3
2
2
2
M
M
M
L
L
L
S
S
S
7
7
7
2
2
2
V
V
V
6
6
6
D
D
D
168PIN PC133 Unbuffered DIMM
256MB With 16Mx8 CL3
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
Refer to the individual component, not the whole module.
Parameter
ns 3
3. Assumed input rise and fall time (tr & tf)= 1ns.
Symbol Min Max
CLK low pulse width tCL 2.5
If tr & tf is longer than 1ns, transient time compensation should be considered,
Unit Note
CLK cycle time
- ns 3
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
CAS latency=3 7.5
tCC
Input setup time tSS 1.5
CAS latency=2
Input hold time tSH 0.8
-
- ns 3
1000 ns 1
- ns 3
CAS latency=3
output delay
t
SAC
1 - ns
- 5.4
ns 1, 2
2
CLK to output
in Hi-Z
CLK to valid
CLK to output in Low-Z tSLZ
CAS latency=2
CAS latency=3 -
t
SHZ
- -
5.4
ns
CAS latency=3
hold time
t
OH
- -
3 -
ns
Output data
CAS latency=2
CAS latency=2
2
- -
CLK high pulse width tCH 2.5 -
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
Note:
1. Parameters depend on programmed CAS latency.
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