Transcend TS32GCF133 Datasheet Page 8

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T
T
T
S
S
S
1
1
1
G
G
G
~
~
~
3
3
3
2
2
2
G
G
G
C
C
C
F
F
F
1
1
1
3
3
3
3
3
3
133X CompactFlash Card
Transcend Information Inc.
8
Signal Name
Dir.
Pin
Description
-INPACK
(PC Card Memory Mode)
-INPACK
(PC Card I/O Mode)
Input Acknowledge
DMARQ
(True IDE Mode)
O
43 This signal is not used in this mode.
The Input Acknowledge signal is asserted by the CompactFlash Storage Card
when the card is selected and responding to an I/O read cycle at the address that
is on the address bus. This signal is used by the host to control the enable of any
input data buffers between the CompactFlash Storage Card and the CPU.
This signal is a DMA Request that is used for DMA data transfers between host
and device. It shall be asserted by the device when it is ready to transfer data to
or from the host. For Multiword DMA transfers, the direction of data transfer is
controlled by -IORD and -IOWR. This signal is used in a handshake manner with
-DMACK, i.e., the device shall wait until the host asserts -DMACK before
negating DMARQ, and reasserting DMARQ if there is more data to transfer.
DMARQ shall not be driven when the device is not selected.
While a DMA operation is in progress, -CS0 and –CS1 shall be held negated and
the width of the transfers shall be 16 bits.
If there is no hardware support for DMA mode in the host, this output signal is not
used and should not be connected at the host. In this case, the BIOS must report
that DMA mode is not supported by the host so that device drivers will not
attempt DMA mode.
A host that does not support DMA mode and implements both PCMCIA and
True-IDE modes of operation need not alter the PCMCIA mode connections
while in True-IDE mode as long as this does not prevent proper operation in any
mode.
-IORD
(PC Card Memory Mode)
-IORD
(PC Card I/O Mode)
-IORD
(True IDE Mode – Except
Ultra DMA Protocol Active)
-HDMARDY
(True IDE Mode – In Ultra
DMA Protocol DMA Read)
HSTROBE
(True IDE Mode – In Ultra
DMA Protocol DMA Write)
I
34 This signal is not used in this mode.
This is an I/O Read strobe generated by the host. This signal gates I/O data onto
the bus from the CompactFlash Storage Card when the card is configured to use
the I/O interface.
In True IDE Mode, while Ultra DMA mode is not active, this signal has the same
function as in PC Card I/O Mode.
In True IDE Mode when Ultra DMA mode DMA Read is active, this signal is
asserted by the host to indicate that the host is read to receive Ultra DMA data-in
bursts. The host may negate -HDMARDY to pause an Ultra DMA transfer.
In True IDE Mode when Ultra DMA mode DMA Write is active, this signal is the
data out strobe generated by the host. Both the rising and falling edge of
HSTROBE cause data to be latched by the device. The host may stop
generating HSTROBE edges to pause an Ultra DMA data-out burst.
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